Jolitz Heritage

Jolitz Heritage Site - Chronicling the Legacies of the Jolitz Family of Silicon Valley, including the accomplishments of William Jolitz, Lynne Jolitz, Rebecca Jolitz, Ben Jolitz, and William Leonard Jolitz. [ Jolitz Heritage ]
 
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Term Addressable Memory of an Accelerator System and Method

Term Addressable Memory of an Accelerator System and Method
US6768992: Term Addressable Memory of an Accelerator System and Method. Grant Date: July 27, 2004. Lynne G. Jolitz. An improved term addressable memory of an accelerator system and method includes a mechanism for performing predetermined plurality of pattern matches of packets to classify them for use with stateful protocol processing units that can resolve session data spread across multiple data packets and process them for the ultimate destination. The invention replaces a conventional content addressable memory (CAM) with a term addressable memory, whereby redundant terms are recorded with a single memory entry. Two classes of terms are recorded with a single memory entry. Two classes of terms are used to match packet addresses and application ports, as well as a much smaller session CAM that matches the aggregate match of all terms to a specific session. Filed Jan. 8, 2001 , Lynne Greer Jolitz . See Lynne Jolitz term memory patent and TCP/IP network accelerator system and method which identifies classes of packet traffic for predictable protocols.